Product Summary

The DSP56301PW80 is a 24-bit digital signal processor. The DSP56301PW80 is a member of the DSP56300 core family of programmable CMOS Digital Signal Processors (DSPs). This family uses a high-performance, single clock cycle per instruction engine. Significant architectural features of the DSP56300 core family include a barrel shifter, 24-bit addressing, instruction cache, and DMA. The DSP56301PW80 offers 80/100 MIPS using an internal 80/100 MHz clock at 3.0–3.6 volts. The DSP56300 core family offers a rich instruction set and low power dissipation, as well as increasing levels of speed and power, enabling wireless, telecommunications, and multimedia products.

Parametrics

DSP56301PW80 absolute maximum ratings: (1)Supply Voltage VCC –0.3 to +4.0 V; (2)All input voltages excluding “5 V tolerant” inputs3 VIN GND – 0.3 to VCC + 0.3 V; (3)All “5 V tolerant” input voltages3 VIN5 GND – 0.3 to VCC + 3.95 V; (4)Current drain per pin excluding VCC and GND I 10 mA; (5)Operating temperature range TJ –40 to +100 ℃; (6)Storage temperature TSTG –55 to +150 ℃.

Features

DSP56301PW80 features: (1)High-Performance DSP56300 Core; (2)Internal Peripherals; (3)Internal Memories; (4)External Memory Expansion; (5)Reduced Power Dissipation.

Diagrams

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
DSP56301PW80
DSP56301PW80

Freescale Semiconductor

Digital Signal Processors & Controllers (DSP, DSC) 80Mhz/80MMACS

Data Sheet

Negotiable 
Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
DSP56001
DSP56001

Other


Data Sheet

Negotiable 
DSP56001A
DSP56001A

Other


Data Sheet

Negotiable 
DSP56002
DSP56002

Other


Data Sheet

Negotiable 
DSP56004
DSP56004

Other


Data Sheet

Negotiable 
DSP56005
DSP56005

Other


Data Sheet

Negotiable 
DSP56007
DSP56007

Other


Data Sheet

Negotiable